1. Field of The Invention
This invention relates to a serial data receiving device for receiving serial data.
2. Description of the Related Art
A serial data receiving device which has a structure as shown in FIG. 1 is known to the present Applicants.
As shown in FIG. 1, the above-mentioned serial data receiving device includes a receiving shift register 10, a shift clock 11, an input terminal 12 for receiving data, a counter 13, a data processing circuit 14, and a data bus 15.
The receiving shift register 10 reads in serial data input from the input terminal 12 in synchronization with signals output from the shift clock 11. The signal output from the shift clock 11 is also input into the counter 13. When a specified number of bits are read in the shift register 10, a data reception end signal is output.
The data processing circuit (CPU) 14 detects an end of data reception by monitoring a data reception end signal, or detects an end of data reception by receiving a data reception end signal as an interrupt signal, and the data processing circuit 14 processes the received data from the receiving shift register 10 through the data bus 15.
FIG. 2 shows an example of a system composed of a plurality of serial data receiving devices which is known by the the present applicants.
The system shown in FIG. 2 is so arranged that the system receives serial data from a transmitter 20 by n units (here n being a positive integer number) of the serial data receiving devices 21 through 2n.
The data transmitted from the transmitter 20 is composed of "data bit", "ID code", and "data" so as to identify the receiving device to which the data is directed.
The receiving devices 21 to 2n are so arranged that each of the receiving devices 21 to 2n determines whether or not the ID code agrees with their own codes whenever data is sent, and processes the data only in case a that the ID code agrees with their own codes.
However, in the above-mentioned system shown, each of the data processing circuits of the receiving devices must have a function of identifying the II) code, thereby a load of a software installed in the data processing circuit becomes very large.
In addition, the above-mentioned serial data receiving devices are so arranged that they read in the data only in a case that the received ID code perfectly agrees with the ID code assigned to their specific codes.
Consequently, there is a high possibility that the data cannot be read in a case that a transmission error has occurred, resulting in a partial change of the bits of the ID code.
In case that the data processing circuit 14 performs a processing which tolerates an error of one bit or so, the data processing circuit 14 must read the data in bit units, thereby a load of the software becomes more heavy.